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Espressif Systems /ESP32-S3 /EXTMEM /DCACHE_SYNC_CTRL

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Interpret as DCACHE_SYNC_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DCACHE_INVALIDATE_ENA)DCACHE_INVALIDATE_ENA 0 (DCACHE_WRITEBACK_ENA)DCACHE_WRITEBACK_ENA 0 (DCACHE_CLEAN_ENA)DCACHE_CLEAN_ENA 0 (DCACHE_SYNC_DONE)DCACHE_SYNC_DONE

Description

******* Description ***********

Fields

DCACHE_INVALIDATE_ENA

The bit is used to enable invalidate operation. It will be cleared by hardware after invalidate operation done.
DCACHE_WRITEBACK_ENA

The bit is used to enable writeback operation. It will be cleared by hardware after writeback operation done.
DCACHE_CLEAN_ENA

The bit is used to enable clean operation. It will be cleared by hardware after clean operation done.
DCACHE_SYNC_DONE

The bit is used to indicate clean/writeback/invalidate operation is finished.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data